- (A) TTLAS
- (B) CMOS
- (C) ECL
- (D) TTLLS
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- (A) logic 0 and 1 are represented by 0 and positive voltage respectively
- (B) logic 0 and, -1 are represented by negative and positive voltages respectively
- (C) logic 0 voltage level is higher than logic 1 voltage level
- (D) logic 0 voltage level is lower than logic 1 voltage level
- (A) 2n
- (B) 22 n
- (C) 2n-1
- (D) — 2n
- (A) FFFF (hex)
- (B) 1111 (binary)
- (C) 7777 (octal)
- (D) All of the above
- (A) NOT gate
- (B) OR gate
- (C) AN
- (D) gate
- (A) Stop signal
- (B) Invert input signal
- (C) Act as a universal gate
- (D) None of the above
- (A) AND gate
- (B) NAND gate
- (C) NOT gate
- (D) None of the above
- (A) (00, 01, 10, 11)
- (B) (00, 10, 01, 11)
- (C) (00, 01, 11, 10)
- (D) (00, 10, 11, 01)
- (A) NOT gate
- (B) OR gate
- (C) AN
- (D) gate
- (A) 19
- (B) 12
- (C) 27
- (D) 21
